Community Newsletter: February 2013

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Message from Accellera Systems Initiative Chair

Shishpal Rawat, Accellera Systems Initiative ChairAccellera Systems Initiative is proud to sponsor the 2013 Design and Verification Conference (DVCon), the industry’s premiere conference for functional design and verification. This year’s conference marks two significant milestones: it is the 10th anniversary of the DVCon under its current name and the 25th anniversary of its family of preceding conferences.

Many of you will recall that DVCon is the result of two standards-based conferences that came together: the VHDL User’s Group, later to become the VHDL International User’s Forum (VIUF), which first met in 1988 and the International Verilog HDL Conference (IVC), which was first held in 1993. Both conferences and their governing bodies (VIUF and Open Verilog International) had extremely talented engineers creating and developing their respective standards. Each had a swell of industry support and tools around the standards. As the standards “wars” (VHDL versus Verilog) took a life of its own, each finally settled to co-exist with the other, resulting in standards that are in use today by the worldwide electronics community.

Accellera was born at that time, when the two standards organizations realized that they would be stronger together and that the industry would benefit much more from one organization focused on standards innovation and development. IVC and VIUF started holding joint meetings in 1997 and merged into “HDLCon” in 1999. HDLCon became “DVCon” in 2003, under which name it continues even as Accellera has gone through further mergers with SPIRIT and OSCI. With over twenty standards developed, Accellera Systems Initiative has come a long way since that time. And DVCon has gone on to become the industry’s go-to place to find out the latest information from the leading edge of design and verification technology, techniques, standards, and methods.

The rest, as they say, is history. DVCon conference chair and Accellera Systems Initiative board member, Stan Krolikoski, provides us with the rich background of DVCon. I invite you to read it here.

We hope you will join us at this year’s conference. With 12 technical sessions, 10 tutorials, 26 posters, two industry panels, and over 30 companies exhibiting, it promises to be an outstanding conference. I look forward to seeing you there!

Sincerely,

Shishpal Rawat, Accellera Systems Initiative Chair
February 2013

 

Working Group Spotlight: "Setting the Standard"

Smooth and efficient design and verification of electronic systems is what Accellera Systems Initiative standards are all about. This blog will provide insights into the standards we set to make your work more efficient.

Setting the Standard

Setting the Standard Blog by Adam ShererWelcome to the first posting of Setting the Standard. This blog will provide insights into the development and use of Accellera Systems Initiative standards. We’ll talk to the chairs of the working groups to learn more about their work today and their vision for the future of their standards work. We’ll talk to users to learn about how they apply the standards and what they need to further improve their efficiency. If you have any questions you’d like answered, please contact me at asherer@cadence.com or my office number at +1-978-262-6389.

Growing the electronics industry’s involvement in standards is a top priority for Shishpal Rawat, Chair of Accellera. I sat down with Shishpal to capture his vision for the blog.

Why should Accellera have a blog and why should the electronics community read it?

As EDA and IP standards have evolved, so have the mechanisms to learn about them. There are several technical standards innovations going on at Accellera that people need to know about. Over the years we have expanded into multiple domains with overlapping interests. For example, the areas IP-XACT, SystemRDL, SystemC, UVM, etc. touch multiple common points – TLM, verification strategies, register allocation, etc. As such, we have moved into an area of “interacting standards” rather than solo standards that could basically live in isolation. Blogs allow us to connect with users, to let them know the latest in standards and find out about resources that are available to help them be successful in their job. Having a blog also helps Accellera. We would like to get real-time feedback from our users on how well our standards are working or interacting in the presence of other standards. This will allow individual working groups to react faster to concerns from the user community and help shape the standards landscape moving forward.

What should readers expect to learn in the Accellera blogs?

Readers will learn about new user groups and technical standards groups that have been formed, call for participation to events, upcoming releases of standards and standards-related success stories. Users will also learn about resources that are available, such as the full length videos of the technical tutorials that are currently available from DVCon 2012.

Give us an example of something you’d like our readers to know?

We have recently recruited a new chair, Alan Hunter, for the UCIS working group. We have started a new working group for SystemRDL under Oren Katzir. We are nearing the completion phase of IP-Tagging standards. We would like our readers to know the goals we are targeting in these working groups and opportunities to adopt new standards.

Who else will be featured in the blogs?

We will feature engineers and project managers like you that are using these standards in addition to our working group chairs, most of whom are also consumers of our standards. Together they will provide insight into standards requirements, development and application. We invite our readers and community leaders to share their standards success stories on this blog as well.


Shishpal, thanks for these insights.

Regards,

Adam Sherer
Blogger on behalf of the Accellera Promotions Committee

 

Accellera Systems Initiative Day at DVCon

DVCon 2013Monday, February 25, 2013
8:30am - 4:30pm
DoubleTree Hotel, San Jose CA

Accellera Systems Initiative invites you to a special day dedicated to technical standards at the 2013 Design and Verification Conference. Find out the latest in EDA and IP standards such as UVM, UPF, SystemC, and AMS being developed and implemented by today’s leading electronics companies. Our Town Hall luncheon features an open question and answer session with Accellera board members, as well as presentation of the annual Technical Excellence Award for outstanding achievement and contribution to Accellera standards.

Join us at this day-long event to connect with experts and users as we learn, share, and network on the latest in standards innovations.

  • Tutorial: Lessons from the Trenches: Migrating Legacy Verification Environments to UVM™
  • Tutorial: Increasing Productivity with SystemC™ in Complex System Design and Verification
  • Town Hall Lunch and Technical Excellence Award Presentation
  • Tutorial: Low Power Design, Verification, and Implementation with IEEE 1801™ UPF™
  • Tutorial: User Experiences at the Forefront of Mixed-Signal Design and Verification

View full details >

 

On the Road to DVCon 2013

DVCon 2013 conference chair Stan Krolikoski gives the scoop on this year's program to be held February 25-28, 2013 in San Jose, CA.


DVCon 2013

February 25-28, 2013
DoubleTree Hotel, San Jose CA
www.dvcon.org

 

DVCon Europe Survey

Take a Quick SurveyThe Design and Verification Conference (DVCon) is the premiere conference sponsored by Accellera Systems Initiative for end users and EDA experts active in functional design and verification technologies, tools, standards and methods.

We are conducting a web survey in order to gather feedback from the various industries across Europe to see whether they are interested and willing to participate in and/or contribute to a newly established conference named “DVCon Europe."

Our goal is for “DVCon Europe” to become the industry-recognized conference where end users, EDA vendors, and EDA experts will meet to present and discuss the latest advancements in SystemC, SystemVerilog, UVM, IP-XACT and other technologies, tools, standards and methods.

We appreciate your participation in this questionnaire, which closes at 10:00pm PST on March 29, 2013.

Take survey >

 

Upcoming Events

27th European SystemC Users' Group Meeting (ESCUG)

Tuesday, March 19, 2013
6:30pm - 9:30pm
Grenoble, France
Co-located with DATE 2013

The 27th European SystemC Users' Group Meeting encompasses not only SystemC but the wider picture of Accellera standards and technologies, such as UVM, SystemVerilog, SVA, and IP-XACT. This meeting will be organized in town hall style, giving experts from Accellera a platform to introduce these design and verification technologies and providing the audience an opportunity to join an interesting discussion.

For an agenda and to register: http://www.ti.uni-tuebingen.de/escug

 

European SystemC Users' Group Workshop
ESL -- Putting the Pieces Together: Integrating SystemC Design and Verification with AMS and Algorithm Design

Friday, March 22, 2013
8:30am - 4:50pm
DATE 2013

This full-day workshop is focused on the integration of SystemC design and verification with AMS and algorithm design. It gives deep insights in how techniques may collaborate and converge. These topics gain more and more interest, because a seamless integration of all relevant design and verification techniques is crucial. Besides digital hardware design, this is substantially important for the areas of algorithm and AMS design. The European SystemC Users’ Group has teamed up with STMicroelectronics, Technical University of Kaiserslautern, NXP, and Bosch to provide expert knowledge and experience in this domain. Complementary materials and presentations for all participants will be provided.

For an agenda and to register: www.date-conference.com/conference/workshop-w1


India SystemC User Group Conference (ISCUG)

Tutorial Day: Sunday, April 14, 2013
Conference Day: Monday, April 15, 2013
Hotel Radisson, Noida, India

The Indian SystemC User's Group (ISCUG) organization aims to accelerate the adoption of SystemC as the open source standard for ESL design. ISCUG provide a platform to share the knowledge, experiences and best practices about SystemC usage. ISCUG organize an annual conference which provides a platform for the SystemC beginners, the SystemC experts, ESL managers and the ESL vendors to share their knowledge, experiences & best practices about SystemC usage.

For more information and to register: www.iscug.in
Early bird pricing ends February 28

 

2013 Global Sponsors

 

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